Present data processing applications include the requirement that several tasks be performed concurrently. These tasks require read and write access to data memories in the the data processing systems. Problems occur when these multitask transactions attempt to read and write data in the memory concurrently. These problems arise when the system is attempting to provide transaction concurrency while ensuring that the performance of tasks is performed in a scheduled manner, i.e. that one task is performed before another. These problems are addressed in a paper entitled "Transaction Monitoring ENCOMPASS: Reliable Distributed Transaction Processing", published in the IEEE Proceedings on Very Large Data Bases, September 1981, pages 244-254. Furthermore, a U.S. patent application Ser. No. 115,146, entitled "Method for Concurrent Record Access Using an Index Tree", filed Oct. 30, 1987 also addresses the problems of concurrent transaction processing. A locking protocol provides for concurrent access to data in a memory by multiple transactions in a ordered manner. Locking prevents one transaction from accessing a record that is being modified, or owned, by another transaction. This ensures that one transaction will not read a record that is in the process of being changed by another transaction, thus ensuring an ordered interaction between these transactions.
One locking protocol technique is illustrated in U.S. Pat. No. 4,680,700 entitled "Virtual Memory Address Translation Mechanism With Combined Hash Address Table And Inverted Page Table" assigned to the present assignee. Another patent describing memory protection for concurrent transaction operation is U.S. Pat. No. 4,638,426 entitled "Virtual Memory Address Translation Mechanism With Control Data Persistence" also assigned to the present assignee. These two references address the application of locking protocols to virtual address translation. Regulating the access to protected data can be performed while performing the task of translating between the virtual addresses and the real addresses in a virtual memory system. In performing the virtual to real address translation, each addressable data block includes additional data that describes the accessibility of this data by transactions. In other words, the setting of these data bits will determine whether a transaction can access a data block.
The object of the present invention to provide a memory controller that grants access to concurrently executing transactions while protecting the integrity of the data being accessed.
An additional object of the present invention is to provide a memory controller that records the access so granted.
The further objective of the present invention is to provide a memory controller that regulates access to protected data blocks stored in a manner as not to impede the efficiency of concurrent transaction execution.